This section is intended to provide a background or context to the invention that is recited in the claims. The description herein may include concepts that could be pursued, but are not necessarily ones that have been previously conceived, implemented or described. Therefore, unless otherwise indicated herein, what is described in this section is not prior art to the description and claims in this application and is not admitted to be prior art by inclusion in this section.
The following abbreviations that may be found in the specification and/or the drawing figures are defined as follows:    BB baseband    CAS column address strobe    CPU central processing unit    DRDRAM direct rambus DRAM    IC integrated circuit    MC memory controller    MIPI mobile industry processor interface    MMU memory management unit    PCI peripheral component interconnect    PDA personal digital assistants    RAM random access memory    RAS row address strobe    ROM read only memory    SATA serial advanced technology attachment    SCSI small computer system interface    UniPro unified protocol    UE user equipment    USB universal serial bus
A general trend in IC interconnections has been the increased usage of serial connections. Memory ICs such as DRAMs, having serial connections, may be used in a number of different types of devices, including computers and handheld units, including mobile communication devices.
Examples of the serial interconnections include PCI Express, SATA, USB, MIPI UniPro, Infiband and Serial RapidIO.
Presently there is at least one type of packet based memory (data, address and instructions are sent in packets). However, this memory uses several reserved command/address and data pins, and the command/address and data interconnections employ synchronous links.